Search found 9 matches

by Malishev
Sat Nov 13, 2021 3:58 pm
Forum: General Discussion
Topic: ESP32-S3 maximum PSRAM/FLASH throughput.
Replies: 3
Views: 4567

Re: ESP32-S3 maximum PSRAM/FLASH throughput.

That is an interesting assertion, especially as there's caching involved which in all but the most suboptimal use cases should give a pretty large speed boost. How did you conclude this? It is my biased experience based on ardupilot port. The whole fw is about 1-2mb and "hot" code size is at least ...
by Malishev
Thu Nov 11, 2021 8:57 am
Forum: General Discussion
Topic: ESP32-S3 maximum PSRAM/FLASH throughput.
Replies: 3
Views: 4567

ESP32-S3 maximum PSRAM/FLASH throughput.

It is not surprising, that the execution speed of many applications on esp32 is bound not by cpu performance as is, but by the code fetch speed. For "ordinary" esp32 it is bound by roughly 80mhz bus speed * 4 qspi bus width = 40mbytes/s or 1/6 byte per clock at 240mhz cpu frequency. For esp32-s3 see...
by Malishev
Wed Aug 07, 2019 6:01 pm
Forum: General Discussion
Topic: DPORT access workaround and high interrupts.
Replies: 5
Views: 7061

Re: DPORT access workaround and high interrupts.

Thank you! It is very flexible and nice solution.
by Malishev
Mon Jun 24, 2019 1:55 pm
Forum: General Discussion
Topic: DPORT access workaround and high interrupts.
Replies: 5
Views: 7061

Re: DPORT access workaround and high interrupts.

Hi! Thank you for looking into this. Disable all not-nmi intrrupts in the workaround looks resonable. I hope the fix will not disable high interrupts in portENTER_CRITICAL, cause this will make high ints much less usefull. I wounder if dport access is used at all in the post initialization stage. It...
by Malishev
Thu Jun 13, 2019 2:29 pm
Forum: General Discussion
Topic: DPORT access workaround and high interrupts.
Replies: 5
Views: 7061

Re: DPORT access workaround and high interrupts.

Actually interrupt handler for interrupt with level > 4 will break both workarounds. APB register preread workaround do not work, cause it only disable level 3 or lower ints. Stalling other cpu workaround also do not actually stall cpu if 4 lev int arrive. So far I got no other responses, so I would...
by Malishev
Thu Jun 13, 2019 4:16 am
Forum: General Discussion
Topic: DPORT access workaround and high interrupts.
Replies: 5
Views: 7061

DPORT access workaround and high interrupts.

Hi!
Is it safe to access peripheral registers from high interrupt handler? I ask, cause this interrupts is not disabled via freertos macro, so esp-idf dport access workaround do not work in this case.
by Malishev
Tue May 21, 2019 7:07 am
Forum: General Discussion
Topic: New Chip ESP32-S2
Replies: 42
Views: 52259

Re: New Chip ESP32-S2

Is this will replace good old existing esp32? Looks like new chip is step back in all areas except cost and usb. 3 uart was already too low for general purpose mcu.
by Malishev
Mon Apr 22, 2019 9:54 am
Forum: General Discussion
Topic: ESP32 cache miss handler
Replies: 0
Views: 2060

ESP32 cache miss handler

I am trying to create simple tool what gather stats about large program. This stats could be used to decide which functions should be placed in the iram.
I wounder do exist some method to catch and record flash cache miss event?
by Malishev
Tue Mar 05, 2019 7:39 am
Forum: General Discussion
Topic: Is it possible to do profiling (gprof) on ESP32?
Replies: 6
Views: 8829

Re: Is it possible to do profiling (gprof) on ESP32?

Hi. Any update on this? Is the gprof finally supported?