Search found 2067 matches

by ESP_igrr
Tue Jul 11, 2017 6:51 pm
Forum: General Discussion
Topic: Systemview with ESP32
Replies: 11
Views: 15006

Re: Systemview with ESP32

Which likely means that the version of OpenOCD which you are using does not support SystemView yet. Which commit of OpenOCD are you using?
by ESP_igrr
Tue Jul 11, 2017 5:48 pm
Forum: General Discussion
Topic: Systemview with ESP32
Replies: 11
Views: 15006

Re: Systemview with ESP32

Please follow documentation section related to SystemView:
http://esp-idf.readthedocs.io/en/latest ... nd-options

(you seem to be using 'apptrace' command instead of 'sysview')
by ESP_igrr
Tue Jul 11, 2017 5:44 pm
Forum: General Discussion
Topic: Sleep timer inaccuracy
Replies: 8
Views: 10262

Re: Sleep timer inaccuracy

Can you record sleep time or wakeup time using an external clock? I would like to understand whether the sleep time actually varies like this, or the sleep time is correct but you are getting incorrect values from gettimeofday. It would be help if you post the code. I have fixed some inaccuracies re...
by ESP_igrr
Mon Jul 10, 2017 4:08 am
Forum: General Discussion
Topic: Clear ULP Coprocessor interrupt?
Replies: 5
Views: 12774

Re: Clear ULP Coprocessor interrupt?

We have investigated this, and this is a bug in hardware design. ULP wakeup signal comes from RTC_SLOW_CLK clock domain while the clear signal is in RTC_FAST_CLK clock domain. Therefore ULP interrupt signal remains high for a relatively long time. If you clear the interrupt status, it will immediate...
by ESP_igrr
Sat Jul 08, 2017 5:09 am
Forum: General Discussion
Topic: Clear ULP Coprocessor interrupt?
Replies: 5
Views: 12774

Re: Clear ULP Coprocessor interrupt?

I was able to reproduce this with an ISR triggered twice (instead of just once). Will investigate next week. In the meantime, the problem may be worked around by masking ULP interrupt in the ISR: CLEAR_PERI_REG_MASK(RTC_CNTL_INT_ENA_REG, RTC_CNTL_ULP_CP_INT_ENA); Another way to work around this is t...
by ESP_igrr
Fri Jul 07, 2017 6:03 am
Forum: General Discussion
Topic: [SOLVED] Change level wake after first wake up
Replies: 8
Views: 10981

Re: Change level wake after first wake up

WiFive: sorry, i haven't noticed that you also mentioned the register to set wakeup level. guillermop: The gist linked above *waits* while the input signal changes level again. You need to replace that part (https://gist.github.com/igrr/54f7fbe0513ac14e1aea3fd7fbecfeab#file-sleep_from_wake_stub_exam...
by ESP_igrr
Fri Jul 07, 2017 2:40 am
Forum: General Discussion
Topic: [SOLVED] Change level wake after first wake up
Replies: 8
Views: 10981

Re: Change level wake after first wake up

There is a single bit you need to set or clear in order to change wakeup trigger level:
https://github.com/espressif/esp-idf/bl ... eep.c#L236
by ESP_igrr
Fri Jul 07, 2017 2:25 am
Forum: General Discussion
Topic: Store Audio Samples on Esp
Replies: 4
Views: 9052

Re: Store Audio Samples on Esp

The crash happens because fopen is returning NULL (can't open the file), and you are not checking the return value. Files added to the project do not automatically get uploaded to the device. The embedding feature suggested by kurtzweber is indeed the easiest way to achieve what you need, provided t...
by ESP_igrr
Wed Jul 05, 2017 8:28 am
Forum: ESP-IDF
Topic: ESP32 PSRAM support
Replies: 112
Views: 198752

Re: ESP32 PSRAM support

Rudi,
Can you use idf-monitor (make monitor) when capturing log output? That tool will decode backtraces printed by the panic handler into source code file names and line numbers, which will make it easier to figure something out from the logs.
by ESP_igrr
Mon Jul 03, 2017 3:24 pm
Forum: ESP32 Arduino
Topic: RTC
Replies: 18
Views: 42444

Re: RTC

The datasheet says that RTC peripherals are powered down in hibernation mode. RTC controller is always powered up, and it includes RTC timer and one of the two GPIO wakeup sources (ext1).

Regarding external RTC chip support, no we don't have plans for adding such drivers to ESP-IDF.