Search found 2067 matches
- Thu Jul 27, 2023 9:20 pm
- Forum: General Discussion
- Topic: Debugging with UART
- Replies: 3
- Views: 1486
Re: Debugging with UART
There is also a runtime GDB server which allows debugging over UART; it is more limited than JTAG interface, though. An example of his feature is available here: https://github.com/espressif/esp-idf/tr ... em/gdbstub
- Thu Jul 27, 2023 12:59 am
- Forum: ESP-IDF
- Topic: How to check firmware bin file for valid signature before writing to flash?
- Replies: 2
- Views: 1065
Re: How to check firmware bin file for valid signature before writing to flash?
Hi Felix, Image signature verification already happens inside esp_ota_end function. This means that if signature verification fails, you can reject the update and not call esp_ota_set_boot_partition. This does mean that if you actually get an invalid OTA image, you spend additional time copying it i...
- Wed Jul 26, 2023 6:25 am
- Forum: ESP-IDF
- Topic: SPI1 External Flash Code esp_flash_
- Replies: 6
- Views: 1081
Re: SPI1 External Flash Code esp_flash_
If that's the only flash chip connected to SPI1, then you can indeed use esp_flash functions, passing a NULL argument instead of the chip handle. Or, even better, as Sprite suggests — use esp_partition APIs. Please check some of the examples in IDF under examples/storage/ directory for this.
- Wed Jul 26, 2023 6:22 am
- Forum: IDEs for ESP-IDF
- Topic: Code linting using SonarLint VSCode extension
- Replies: 4
- Views: 4676
Re: Code linting using SonarLint VSCode extension
In that case, please try configuring that option. Otherwise sonarLint can't find the paths where to search for the header files.
compile_commands.json file should be generated in build/ directory of your project.
compile_commands.json file should be generated in build/ directory of your project.
- Tue Jul 25, 2023 7:42 pm
- Forum: ESP-IDF
- Topic: Core i7 and still too long compile time
- Replies: 3
- Views: 706
Re: Core i7 and still too long compile time
Another thing to check is whether you have ccache enabled. Enabling ccache can significantly speed up subsequent compilations.
- Tue Jul 25, 2023 11:26 am
- Forum: ESP-IDF
- Topic: SPI1 External Flash Code esp_flash_
- Replies: 6
- Views: 1081
Re: SPI1 External Flash Code esp_flash_
Just to make sure I understand what you are trying to achieve: do you intend to have two SPI NOR flash chips on SPI1 bus? If yes, do you intend to use the second chip just for data storage or for code execution as well? Also, what size of flash do you intend to connect? (Would it be feasible to get ...
- Tue Jul 25, 2023 11:22 am
- Forum: General Discussion
- Topic: Only 4M PSRAM seen on N8R8 chip
- Replies: 2
- Views: 761
Re: Only 4M PSRAM seen on N8R8 chip
Hi Dave, ESP32 is limited to only 4 MB of address space for external RAM. With 8 MB PSRAM modules you can use "himem" API to do bank switching, which is one of the ways how you can access physical memory which is larger than the address space. https://docs.espressif.com/projects/esp-idf/en/latest/es...
- Tue Jul 25, 2023 11:18 am
- Forum: IDEs for ESP-IDF
- Topic: Code linting using SonarLint VSCode extension
- Replies: 4
- Views: 4676
Re: Code linting using SonarLint VSCode extension
Just to check, have you specified sonarlint.pathToCompileCommands setting? If you run the linter from the CLI, do you get the same error reported?
- Tue Jul 25, 2023 9:37 am
- Forum: Hardware
- Topic: ESP32-C3 needs external flash chip?
- Replies: 19
- Views: 14119
Re: ESP32-C3 needs external flash chip?
You need to check the chip datasheet, in this case https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.pdf. In chapter 2.2, there is a pinout diagram. For example, for pin 4 of the package, you will find that it corresponds to GPIO0. Therefore you need to pass "0" as th...
- Tue Jul 25, 2023 9:28 am
- Forum: Hardware
- Topic: esp32-s3-wroom-1u-n8r8 factory settings of eFuses
- Replies: 3
- Views: 969
Re: esp32-s3-wroom-1u-n8r8 factory settings of eFuses
I don't think this is documented in a single place. There is some information in the chip TRM, eFuse chapter. Generally, the following eFuses will be burnt in the factory: chip version related — at chip production time package (SIP) type related — at chip production time MAC & optional unique ID — a...