Search found 92 matches
- Sat Oct 27, 2018 6:42 pm
- Forum: Documentation
- Topic: Documentation Requests/Feedback
- Replies: 81
- Views: 205542
Re: Document Requests
Not sure if having another document helps here, but we're always open to suggestions. Do you have an example of what you would expect a document like that to look at? Sent PM. Also it does not make sense to name SPI pins SPI*_WP and SPI*_HOLD. WP nor HOLD functions do not work. It should be either ...
- Wed Oct 24, 2018 9:32 am
- Forum: Documentation
- Topic: Documentation Requests/Feedback
- Replies: 81
- Views: 205542
Re: Document Requests
FWIW, a fair few of them already are documented in the TRM; at least the I2C one is. We're going to look into the others as well, and check if we need to put them in the TRM or the ECO document. In that case there should be another document describing all known HW bugs like it is common among other...
- Sat Oct 20, 2018 11:33 am
- Forum: Documentation
- Topic: Documentation Requests/Feedback
- Replies: 81
- Views: 205542
Re: Document Requests
There are many HW bugs in ESP32 peripherals that should be mentioned in the "ECO and Workarounds for Bugs in ESP32" document. For instance: [SPI] dummy phase does not work while using mosi phase [SPI] CS setup time does not work in full duplex [SPI] there are some issues with DMA (see https://github...
- Sat Sep 29, 2018 10:00 am
- Forum: General Discussion
- Topic: Gripes on ESP32/ESP-IDF
- Replies: 51
- Views: 61106
Re: Gripes on ESP32/ESP-IDF
As a conclusion all of this I believe people should know following things: ESP32 ADC is crap GDB/OpenOCD is pretty buggy, I would not say it is usable there are still critical bugs in ESP-IDF like this one in task scheduling to be honest hardware drivers are written really badly and it does not seem...
- Thu Sep 27, 2018 10:47 am
- Forum: Hardware
- Topic: GPIO invert settings
- Replies: 3
- Views: 9149
GPIO invert settings
Hi,
is there any case when GPIO_FUNCm_IN_INV_SEL, GPIO_FUNCn_OEN_INV_SEL and GPIO_FUNCn_OUT_INV_SEL can be useful?
See TRM V3.8 pages 68 and 69.
is there any case when GPIO_FUNCm_IN_INV_SEL, GPIO_FUNCn_OEN_INV_SEL and GPIO_FUNCn_OUT_INV_SEL can be useful?
See TRM V3.8 pages 68 and 69.
- Wed Sep 26, 2018 7:05 pm
- Forum: General Discussion
- Topic: Full duplex SPI MODE 3 CS line pulls down at same time of CLK
- Replies: 2
- Views: 4102
Re: Full duplex SPI MODE 3 CS line pulls down at same time of CLK
Generally CS should be always toggled before CLK signal. There is a hardware bug where setting cs_ena_pretrans does not have any effect in full duplex.
You can control CS line as GPIO (set it low before SPI transmission, set it high after transmission).
You can control CS line as GPIO (set it low before SPI transmission, set it high after transmission).
- Sun Sep 23, 2018 2:01 pm
- Forum: Hardware
- Topic: SPI flash commands on HSPI, VSPI
- Replies: 1
- Views: 4373
Re: SPI flash commands on HSPI, VSPI
Bump. It seems like flash commands work both on HSPI and VSPI. But when using these commands what SPI configuration is ignored and what needs to be set? For example when using flash_rdsr (https://github.com/espressif/esp-idf/blob/3276a1316f66a923ee2e75b9bd5c7f1006d160f5/components/soc/esp32/include/...
- Wed Sep 19, 2018 7:05 pm
- Forum: ESP-IDF
- Topic: WRITE_PERI_REG vs REG_WRITE
- Replies: 2
- Views: 8169
WRITE_PERI_REG vs REG_WRITE
Hi,
looking into this file https://github.com/espressif/esp-idf/bl ... /soc/soc.h it seems that REG_* and PERI_REG_* do the same because ETS_UNCACHED_ADDR and ETS_CACHED_ADDR does nothing. What is the idea behind it?
looking into this file https://github.com/espressif/esp-idf/bl ... /soc/soc.h it seems that REG_* and PERI_REG_* do the same because ETS_UNCACHED_ADDR and ETS_CACHED_ADDR does nothing. What is the idea behind it?
- Mon Sep 03, 2018 11:47 am
- Forum: General Discussion
- Topic: What would you like to see in The Next Chip?
- Replies: 426
- Views: 785368
Re: What would you like to see in The Next Chip?
I also wonder if it is still worth to use Xtensa architecture. Well it is cheaper, you have some experience with it and you have also already done a lot of work on it... But Xtensa ISA is under NDA so the only thing ESP users can do is stick up with ESP-IDF and hope that some missing features / bugs...
- Sat Sep 01, 2018 3:38 pm
- Forum: General Discussion
- Topic: What would you like to see in The Next Chip?
- Replies: 426
- Views: 785368
Re: What would you like to see in The Next Chip?
What would you like to see in The Next Chip? I now understand why manuf. don't ask this question. I have been following this post since its creation. Very, very few good ideas, but the majority of them are people wanting to make this chip suit their own goals. Not to mention trying to throw everyth...