Clarifications on strapping pins

ZaneKaminski
Posts: 7
Joined: Sat Jan 28, 2017 11:32 pm

Clarifications on strapping pins

Postby ZaneKaminski » Sun Mar 12, 2017 11:44 pm

The following table is included in Figure 2 in the ESP32 datasheet:
Screen Shot 2017-03-12 at 5.36.52 PM.png
Screen Shot 2017-03-12 at 5.36.52 PM.png (35.47 KiB) Viewed 5534 times
I am not sure how to interpret this type of truth table. It it saying that both GPIO0 and GPIO2 have to be low to download the boot image? What happens when GPIO0 is low but GPIO2 is high?

I have always seen tables written like this:
Screen Shot 2017-03-12 at 7.38.11 PM.png
Screen Shot 2017-03-12 at 7.38.11 PM.png (18.05 KiB) Viewed 5534 times
Maybe someone could fill this table in and that would clarify it. Thank you for your help.

Zane Kaminski

ESP_Angus
Posts: 2344
Joined: Sun May 08, 2016 4:11 am

Re: Clarifications on strapping pins

Postby ESP_Angus » Mon Mar 13, 2017 6:58 am

If GPIO0 is 1 then the value of GPIO2 can be 0 or 1 without changing the boot mode (hence the "don't care".)

If GPIO0 is 0 and GPIO2 is 1 (the combination not described in the datasheet truth table) then the ESP32 goes into an undocumented internal test mode.

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