I want an ESP32 to output I2S data with its I2S0 interface in slave mode.
I'm finding that with the I2S interface in master mode, the Tx data is correct. However, with it in slave mode, and the BCK and WS (FS) clocks supplied from an SAI interface (configured for I2S) in an STM32F767 MCU, some of the samples appear as zeros.
This can easily be seen with the i2s_adc_dac example in esp-idf/examples/peripherals. Here are the signals. The top trace is the data from the I2S interface:
Note the zeros in the decoded I2S at the bottom of the second (slave mode) image.
Note also that the zeros replace samples; the zeros are not inserted. (I've tested this by outputting an incrementing integer. I found that 450, 451, 452, 453 typically becomes something like 450, 0, 0, 453).
I can see nothing in the esp-idf i2s.c driver file that could cause this problem. When slave mode is requested, it simply configures the IO pins appropriately and sets the I2S peripheral to slave mode.
Section 12.3 of the ESP32 technical reference says "When ESP32 I2S works in slave mode, the master must use I2Sn_CLK as the master clock and fi2s>= 8 *fBCK." I don't know whether that is relevant or not. In any case, which master is it referring to, given that if the ESP32 I2S interface is configured as a slave then the master is likely elsewhere - somewhere that it cannot use I2Sn_CLK?
These two posts may be about the same problem:
The ESP32 module is mounted on a 4 layer PCB (with power planes) along with the STM32F767, and the ESP32 has its own 3.3V 1A LDO regulator, so I don't think signal / power integrity is a problem. The I2S clocks supplied by the STM32F767 come via 330R resistors (which limit the current in the event that both the ESP32 and STM32 are configured in master mode) and are clean.
- ESP32: ESP-WROOM-32. Silicon revision 1. Main clock = 40Mhz. MCU clock = 240Mhz.
- esp-idf: v3.2-dev-1231-g3977d4b56
- I2S pins: BCK = IO16, WS (FS) = IO17, D = IO21
- OS: Windows 7