JLink + openocd for ESP32WROOM not working

adolfi
Posts: 6
Joined: Fri Mar 15, 2019 4:18 pm

JLink + openocd for ESP32WROOM not working

Postby adolfi » Fri Mar 15, 2019 4:44 pm

Hi all,
I am new to ESP32. I connected ESP32-DevKitC with SEGGER JLink following the instructions at herehttps://docs.espressif.com/projects/esp ... -jtag.html.

I use the following command line for OpenOCD

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bin/openocd -s share/openocd/scripts -f interface/jlink.cfg -f board/esp-wroom-32.cfg
The connection appears to work as I get some meaningful info and TAP detection

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Info : VTarget = 3.322 V
Info : Reduced speed from 20000 kHz to 15000 kHz (maximum).
Info : Reduced speed from 20000 kHz to 15000 kHz (maximum).
Info : clock speed 20000 kHz
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
however the next lines report errors

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Info : xtensa_poll: Target offline
Error: xtensa_poll: Target failure
Polling target esp32 failed, trying to reexamine
Error: xtensa_poll: Target failure
Polling target esp32 failed, trying to reexamine
Error: xtensa_poll: Target failure
[... goes on forever ...]
Is there anything I should check or try?
Thanks

ESP_igrr
Posts: 1440
Joined: Tue Dec 01, 2015 8:37 am

Re: JLink + openocd for ESP32WROOM not working

Postby ESP_igrr » Sat Mar 16, 2019 9:25 am

What output do you get if you run the following?

bin/openocd -s share/openocd/scripts -f interface/jlink.cfg -f board/esp-wroom-32.cfg -c "init; reset halt"

After this, try connecting with GDB.

adolfi
Posts: 6
Joined: Fri Mar 15, 2019 4:18 pm

Re: JLink + openocd for ESP32WROOM not working

Postby adolfi » Mon Mar 18, 2019 3:33 pm

ESP_igrr wrote: What output do you get if you run the following?

bin/openocd -s share/openocd/scripts -f interface/jlink.cfg -f board/esp-wroom-32.cfg -c "init; reset halt"

After this, try connecting with GDB.
Hi ESP_igrr,
thanks for answering.
I was using the AT FW and I realized that the default RTS/CTS may conflict with JTAG TMS/TDO. Then I switched to the blink application to be in line with the debug tutorial.
Now I get a good output when launching openocd

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aldo@host:~/AIM/esp/openocd-esp32$ bin/openocd -s share/openocd/scripts -f interface/jlink.cfg -f board/esp-wroom-32.cfg
Open On-Chip Debugger  v0.10.0-esp32-20190313 (2019-03-13-09:52)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
adapter speed: 20000 kHz
Info : Configured 2 cores
esp32 interrupt mask on
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : J-Link V10 compiled Mar  7 2019 15:19:19
Info : Hardware version: 10.10
Info : VTarget = 3.322 V
Info : Reduced speed from 20000 kHz to 15000 kHz (maximum).
Info : Reduced speed from 20000 kHz to 15000 kHz (maximum).
Info : clock speed 20000 kHz
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : Listening on port 3333 for gdb connections
but when I try to connect with gdb

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xtensa-esp32-elf-gdb -x gdbinit build/blink.elf
it does not work. openocd reports

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Info : accepting 'gdb' connection on tcp/3333
Error: No symbols for FreeRTOS
Error: cpu0: esp32_fetch_all_regs (line 268): DSR (00000088) indicates DIR instruction generated an overrun!
Error: cpu1: esp32_fetch_all_regs (line 268): DSR (00000088) indicates DIR instruction generated an overrun!
Info : Target halted. PRO_CPU: PC=0x400E270A (active)    APP_CPU: PC=0x00000000 
Error: cpu0: xtensa_write_memory (line 802): DSR (8000CC13) indicates DIR instruction generated an exception!
Warn : esp32: Failed writing 4 bytes at address 0x3ff5f064, data - a1, 3a, d8, 50, 00, 00, 00, 00
Error: Failed to write ESP32_TIMG0WDT_PROTECT (-4)!
Info : Detected debug stubs @ 3ffb26dc on core0 of target 'esp32'
Error: cpu0: xtensa_read_memory (line 695): DSR (00000088) indicates DIR instruction generated an overrun!
Warn : cpu0: Failed reading 5892 bytes at address 0x40090000
Error: no working area available, can't alloc space for stub code!
Error: Failed to load stub (-308)!
Error: Algorithm run failed (-308)!
Error: Failed to run flasher stub (-308)!
Warn : Failed to get flash mappings (-308)!
Error: cpu0: xtensa_write_memory (line 802): DSR (0000008D) indicates target still busy!
Error: cpu0: xtensa_write_memory (line 802): DSR (0000008D) indicates DIR instruction generated an overrun!
Warn : esp32: Failed writing 512 bytes at address 0x40090000, data - 40, 00, f0, 3f, 44, 00, f0, 3f
Error: Failed to write stub section!
Error: Failed to load stub (-4)!
Error: Algorithm run failed (-4)!
Error: Failed to run flasher stub (-4)!
Error: cpu0: xtensa_read_memory (line 695): DSR (00000088) indicates DIR instruction generated an overrun!
Warn : cpu0: Failed reading 5892 bytes at address 0x40090000
Error: no working area available, can't alloc space for stub code!
Error: Failed to load stub (-308)!
Error: Algorithm run failed (-308)!
Error: Failed to run flasher stub (-308)!
Error: Failed to probe flash, size 0 KB
Error: auto_probe failed
Error: Connect failed. Consider setting up a gdb-attach event for the target to prepare target for GDB connect, or use 'gdb_memory_map disable'.
Error: attempted 'gdb' connection rejected
I get similar errors if I use the option

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-c "init; reset halt"
to openocd

ESP_igrr
Posts: 1440
Joined: Tue Dec 01, 2015 8:37 am

Re: JLink + openocd for ESP32WROOM not working

Postby ESP_igrr » Tue Mar 19, 2019 1:09 am

xtensa-esp32-elf-gdb -x gdbinit build/blink.elf

Instructs GDB to connect first, and then load the ELF file. As such, OpenOCD doesn't get the list of symbols related to FreeRTOS.
Please try instead

xtensa-esp32-elf-gdb build/blink.elf -x gdbinit

adolfi
Posts: 6
Joined: Fri Mar 15, 2019 4:18 pm

Re: JLink + openocd for ESP32WROOM not working

Postby adolfi » Tue Mar 19, 2019 11:22 am

Hi ESP_igrr,
when I wrote
I get similar errors if I use the option
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-c "init; reset halt"
to openocd
I meant that running just

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bin/openocd -s share/openocd/scripts -f interface/jlink.cfg -f board/esp-wroom-32.cfg -c "init; reset halt"
I get these errors

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Info : J-Link V10 compiled Mar  7 2019 15:19:19
Info : Hardware version: 10.10
Info : VTarget = 3.322 V
Info : Reduced speed from 20000 kHz to 15000 kHz (maximum).
Info : Reduced speed from 20000 kHz to 15000 kHz (maximum).
Info : clock speed 20000 kHz
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : esp32: Debug controller 0 was reset (pwrstat=0x5F, after clear 0x0F).
Info : esp32: Core 0 was reset (pwrstat=0x5F, after clear 0x0F).
Info : esp32: Debug controller 1 was reset (pwrstat=0x5F, after clear 0x0F).
Info : esp32: Core 1 was reset (pwrstat=0x5F, after clear 0x0F).
Info : Listening on port 3333 for gdb connections
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Error: cpu0: esp32_fetch_all_regs (line 268): DSR (00000088) indicates DIR instruction generated an overrun!
Error: cpu1: esp32_fetch_all_regs (line 268): DSR (00000088) indicates DIR instruction generated an overrun!
Info : Target halted. PRO_CPU: PC=0x400E270A (active)    APP_CPU: PC=0x00000000 
Error: cpu0: xtensa_write_memory (line 802): DSR (8000CC13) indicates DIR instruction generated an exception!
Warn : esp32: Failed writing 4 bytes at address 0x3ff5f064, data - a1, 3a, d8, 50, 00, 00, 00, 00
Error: Failed to write ESP32_TIMG0WDT_PROTECT (-4)!
Info : Detected debug stubs @ 3ffb26dc on core0 of target 'esp32'
Error: cpu0: xtensa_read_memory (line 695): DSR (00000088) indicates DIR instruction generated an overrun!
Warn : cpu0: Failed reading 76 bytes at address 0x50000000
Error: esp32_soc_reset 528 err=-4
so in my understading there is something wrong, independently on gdb (not started yet). Do you agree?

Aldo

adolfi
Posts: 6
Joined: Fri Mar 15, 2019 4:18 pm

Re: JLink + openocd for ESP32WROOM not working

Postby adolfi » Thu Mar 21, 2019 2:59 pm

Hi,
I managed to get it "almost" working by lowering JTAG programming frequency in

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share/openocd/scripts/board/esp-wroom-32.cfg

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#adapter_khz 20000
adapter_khz 5000
However, the system is slow, and I have some hiccups:
- the first GDB connection generates the following openocd log snippet and fails

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Error: No symbols for FreeRTOS
Info : Target halted. PRO_CPU: PC=0x4009171A (active)    APP_CPU: PC=0x40000400 
Info : Flash mapping 0: 0x100020 -> 0x3f400020, 132 KB
Info : Flash mapping 1: 0x130018 -> 0x400d0018, 903 KB
Info : Target halted. PRO_CPU: PC=0x4009171A (active)    APP_CPU: PC=0x40000400 
Info : Auto-detected flash size 4096 KB
Info : Using flash size 4096 KB
Info : Target halted. PRO_CPU: PC=0x4009171A (active)    APP_CPU: PC=0x40000400 
Info : Flash mapping 0: 0x100020 -> 0x3f400020, 132 KB
Info : Flash mapping 1: 0x130018 -> 0x400d0018, 903 KB
Info : Using flash size 904 KB
Info : Target halted. PRO_CPU: PC=0x4009171A (active)    APP_CPU: PC=0x40000400 
Info : Flash mapping 0: 0x100020 -> 0x3f400020, 132 KB
Info : Flash mapping 1: 0x130018 -> 0x400d0018, 903 KB
Info : Using flash size 136 KB
Warn : negative reply, retrying
Warn : negative reply, retrying
Warn : negative reply, retrying
Error: GDB missing ack(2) - assumed good
Info : dropped 'gdb' connection
the second connection attempt works with the following lines in openocd

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Info : accepting 'gdb' connection on tcp/3333
Error: No symbols for FreeRTOS
Error: Error2 reading FreeRTOS thread name.
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : esp32: Debug controller 0 was reset (pwrstat=0x5F, after clear 0x0F).
Info : esp32: Core 0 was reset (pwrstat=0x5F, after clear 0x0F).
Info : Target halted. PRO_CPU: PC=0x5000004B (active)    APP_CPU: PC=0x00000000 
Info : esp32: Core 0 was reset (pwrstat=0x1F, after clear 0x0F).
Info : esp32: Debug controller 1 was reset (pwrstat=0x5F, after clear 0x0F).
Info : esp32: Core 1 was reset (pwrstat=0x5F, after clear 0x0F).
Info : Target halted. PRO_CPU: PC=0x40000400 (active)    APP_CPU: PC=0x40000400 
Info : Target halted. PRO_CPU: PC=0x4011CEC3 (active)    APP_CPU: PC=0x00000000 
it appears there is some sort of flash size detection loop the first time. Any insight or suggestion on how to avoid it?

Moreover:
  • I used JLink on ARM-based devices @ 4kHz and was not experiencing such latency with debugger (it takes various seconds to step over a source code instruction). Is this expected for this architecture?
  • should I use an FT232H-based adapter and expect better performances?
  • alternatively, do you recommend the WROVER platform for JTAG debugging instead? I can consider switching to it for early prototyping phase, but I would like to have a reliable solution when integrating VROOM32 in our own board. In that case we are not planning to mount an on-board FT232H, but we would like to have JTAG access if needed for development or debugging

ESP_igrr
Posts: 1440
Joined: Tue Dec 01, 2015 8:37 am

Re: JLink + openocd for ESP32WROOM not working

Postby ESP_igrr » Thu Mar 21, 2019 3:13 pm

This error:
Error: No symbols for FreeRTOS
indicates that the ELF file hasn't been loaded into GDB prior to 'target remote :3333'. Did you switch the order of arguments when running GDB?

I'm not sure about "Warn : negative reply, retrying" though... Would you be able to add "-d 3" flag to OpenOCD command line and grab full debug output when this happens?

W.r.t. using FT2232H vs Jlink: with FT2232H you should be able to achieve higher speeds; however even at 5MHz debugging should be usable. Perhaps Jlink driver has some extra latency for each operation. WROVER-KIT is a good option for the prototyping stage. Once you move to the production PCB, you can still use WROVER-KIT for debugging: just disconnect the jumpers and use wires to connect JTAG pins to your PCB.

adolfi
Posts: 6
Joined: Fri Mar 15, 2019 4:18 pm

Re: JLink + openocd for ESP32WROOM not working

Postby adolfi » Fri Mar 29, 2019 6:15 pm

Hi ESP_igrr,
first of all I realized I did not mention I am running Linux Mint 19.1 in a VirtualBox VM. Sorry about that.
I did not think this made a difference, as I saw the basic connection was working (JLink and usb2uart devices assigned to the virtual machine).

Instead I had the chance to test on a native Linux box and the connection with the debugger is much more reliable and single stepping is usable.

I still get the

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Error: No symbols for FreeRTOS
message. I do not think I switched the order of the arguments. I am currently running eclipse, following espressif's guidelines

Image

so I do not know why it does not find the FreeRTOS symbols.

Thanks
Aldo

4InnoUnthan
Posts: 1
Joined: Tue Apr 02, 2019 2:04 pm

Re: JLink + openocd for ESP32WROOM not working

Postby 4InnoUnthan » Tue Apr 02, 2019 2:21 pm

Hello everybody,

I am running into similar problems:

Open On-Chip Debugger v0.10.0-esp32-20190313 (2019-03-13-09:57)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
adapter speed: 20000 kHz
Info : Configured 2 cores
esp32 interrupt mask on
Info : J-Link V10 compiled Feb 2 2018 18:12:40
Info : Hardware version: 10.10
Info : VTarget = 3.322 V
Info : Reduced speed from 20000 kHz to 15000 kHz (maximum).
Info : Reduced speed from 20000 kHz to 15000 kHz (maximum).
Info : clock speed 20000 kHz
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : esp32: Debug controller 0 was reset (pwrstat=0x5F, after clear 0x0F).
Info : esp32: Core 0 was reset (pwrstat=0x5F, after clear 0x0F).
Info : esp32: Debug controller 1 was reset (pwrstat=0x5F, after clear 0x0F).
Info : esp32: Core 1 was reset (pwrstat=0x5F, after clear 0x0F).
Info : Listening on port 3333 for gdb connections
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Error: cpu0: esp32_fetch_all_regs (line 268): DSR (00000088) indicates DIR instruction generated an overrun!
Error: cpu1: esp32_fetch_all_regs (line 268): DSR (00000088) indicates DIR instruction generated an overrun!
Info : Target halted. PRO_CPU: PC=0x400EBC82 (active) APP_CPU: PC=0x00000000
Error: cpu0: xtensa_write_memory (line 802): DSR (8000CC13) indicates DIR instruction generated an exception!
Warn : esp32: Failed writing 4 bytes at address 0x3ff5f064, data - a1, 3a, d8, 50, 28, 7b, a2, 02
Error: Failed to write ESP32_TIMG0WDT_PROTECT (-4)!
Info : Detected debug stubs @ 3ffc0aac on core0 of target 'esp32'
Error: cpu0: xtensa_read_memory (line 695): DSR (00000088) indicates DIR instruction generated an overrun!
Warn : cpu0: Failed reading 76 bytes at address 0x50000000
Error: esp32_soc_reset 528 err=-4
in procedure 'program_esp32'

** Unable to reset target **
shutdown command invoked

Info : Restore debug stubs @ 3ffc0aac on core0 of target 'esp32'



I could not find the option to lower the frequency in the board cfg file. Where exactly can I adapt the frequency? Did adjusting it do the trick?


I appreciate every advice or progress with wroom-32 and jlink! Thank you

adolfi
Posts: 6
Joined: Fri Mar 15, 2019 4:18 pm

Re: JLink + openocd for ESP32WROOM not working

Postby adolfi » Wed Apr 03, 2019 6:52 am

Hi 4InnoUnthan,
the wroom configuration file

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share/openocd/scripts/board/esp-wroom-32.cfg
is in openocd distribution. The frequency setting is in line 61 in my installation.

As for the functionality, as I said, it works fine for me on a Linux host (not VM). On native windows I had some troubles configuring and switching J-Link drivers, then I gave up, so I cannot say for sure.

I did not solve yet the issue with FreeRTOS symbols, but source level debugging was working fine for what I could see (short sessions).

Aldo

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